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 Datasheet ← Enter
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Model
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Timing Analysis
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State Analysis
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Channel
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Total Sample Memory
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Glitch Trigger
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Hardware Trigger
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Input Sensitivity
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TL2036
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4GHz
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200MHz
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36
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180K bits
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500 ps
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UART, I2C, I2S, SPI,CAN,
SVID
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0.25 Vpp
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TL2136
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4GHz
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200MHz
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36
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18M bits
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500 ps
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UART, I2C, I2S, SPI, CAN,
SVID
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0.25 Vpp
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TL2236
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4GHz
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200MHz
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36
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72M bits
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500 ps
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UART, I2C, I2S, SPI, CAN,
SVID
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0.25 Vpp
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LA2000P
series
 Datasheet ← Enter
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Model
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Timing Analysis
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Channel
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Memory Depth(per
channel)
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State Analysis
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Trigger Layer
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LA2132P-128K (Discontinued)
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200MHz
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32
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128K bits
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75MHz
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16
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LA2132P-512K (Discontinued)
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200MHz
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32
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512K bits
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75MHz
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16
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LA2132P-2M (Discontinued)
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200MHz
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32
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2M bits
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75MHz
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16
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LA2164P-128K (Discontinued)
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200MHz
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64
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128K bits
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75MHz
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16
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LA2164P-512K (Discontinued)
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200MHz
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64
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512K bits
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75MHz
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16
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LA2164P-2M
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200MHz
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64
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2M bits
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75MHz
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16
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 Datasheet
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Model
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Timing Analysis
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Channel
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Memory Depth(per
channel)
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State Analysis
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Trigger Layer
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PKLA-1116 (Discontinued)
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200MHz/s
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16
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128K
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75MHz
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1
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PKLA-1216
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200MHz/s
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16
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256K
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75MHz
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1
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PKLA-1616 (Discontinued)
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200MHz/s
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16
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1M
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75MHz
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1
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PKLA-1616 +
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400MHz/s
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16
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1M
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100MHz
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1
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