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LA4136B Logic Analyzer

LA4000 Logic Analyzer

• PC-based
• 136 channels
• USB 3.0 interface, 12V power adaptor
• 4GHz Timing Analysis / 400MHz State Analysis
• 32Gb Memory
• Active Probe
• Logic, State and Protocol triggers
• Stackable with a DSO to form an MSO

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The LA4000 series excels in both timing analysis and state analysis compared to the LA3000+. The LA4000 model achieves a frequency of 4 GHz in timing analysis and an impressive 400 MHz in state analysis, making it an ideal choice for logic analysis in high-speed data transmission, communication protocol analysis, and handling complex signal structures.

The LA4136B logic analyzer is a versatile tool, offering comprehensive support with its 136 channels. It addresses various application scenarios, from analyzing signal structures to decoding and debugging communication protocol buses. The LA4136B model, in particular, stands out for its robust performance, making it an ideal choice for tasks involving ADC and FPGA chip development and debugging.

The LA4000 series also supports stacking measurements with various oscilloscopes through the MCX to BNC cable, facilitating seamless connections with oscilloscopes from other brands such as Keysight, R&S, Tektronix, Acute TravelScope, and more.

Whether in applications requiring high-speed timing analysis or dealing with complex state analysis, the LA4000 series proves to be a reliable partner, offering robust support and versatile applications for your measurement tasks.

Software Window:
MIPI I3C (LA Mode) :


MIPI I3C (PA Mode):

Logic Analyzer (LA) Mode

• Capture digital waveforms and support bus decodes. Able to stack with a DSO to form as an MSO.

• Provides multiple storage modes, users could select to have long time recording or precision acquisition.


• Long Time Record: Transitional Storage VS Compressed Storage

For signal capture and analysis, usually require to record the signal for a long time. If the data is stored in a compressed way, it will cause your software to lag or even stop functioning when decompressing the data after it is sent back to the computer. Because PC memory size might insufficient for decompressed data size. To satisfy the requirement of smooth software operation and long-term recording without missing any data, the storage method adopted by the Acute analyzer is transitional storage rather than compression. After returning to the PC software, it doesn"t need to do the decompression. The decoded results can be displayed while the analysis is finished.

    Parallel Clause Triggers
    16-States parallel IF Clause settings for 128/64 channel value compare combined with AND/OR logic condition and 4 Timer/Counter conditions.

    Flow chart bus triggers

    Power trigger for serial bus, 8-states flow chart setting with Counter/Timer

    Detail parameters for each states

    Stack With Other Vendors of Oscilloscope

    Add Notes & Pictures in Waveform

    Protocol Analyzer (PA) Mode
    It is hardware decoding, may log protocol data very long time if without waveforms. Application timing: Preliminary protocol debug.

    Protocol Analyzer
    Show real-time protocol data.
    Application timing: massive protocol data with some idles in between.

    Protocol Logger
    Like data logger, save massive data into SSD hard drive.
    Application timing: massive protocol data.

    Protocol Monitor
    Like dash cameras, record protocol data by the device’s memory only.
    Application timing: trigger event only happens in very long time.

    LA Spec.
    Power Source
    12V Power adapter
    Static Power Consumption
    30W
    Max Power Consumption
    75W
    Hardware Interface
    USB 3.0
    Timing Analysis (Asynchronous,Max. Sample Rate)
    4GHz
    State Clock Rate (Synchronous,External Clock)
    400MHz
    Storage
    Conventional Timing, Transitional Timing
    Channels
    136
    Total Memory
    32Gb
    Timing Analysis
    Available Chs (Conventional / Transitional Timing) - Memory per Ch
    4GHz Timing [Available Chs] - Memory per Ch
    [16 / 16]-2Gb
    2GHz Timing [Available Chs] - Memory per Ch
    [32 / 32]-1Gb
    1GHz Timing [Available Chs] - Memory per Ch
    [64 / 64]-500Mb
    500MHz Timing [Available Chs] - Memory per Ch
    [128 / 128]-250Mb
    250MHz Timing [Available Chs] - Memory per Ch
    [128 / 128]-250Mb
    Channel to channel skew
    250 ps
    Input channels
    N/A
    Input impedance
    ~ 55KΩ || <2pF to 1Vdc
    Max. (Non-destructive)
    ±40V
    Input operation
    ±15V
    Input sensitivity
    ~300mV
    Threshold group
    N/A
    Threshold range
    ±15V
    Threshold resolution
    10mV
    Threshold accuracy
    ±100mV + 5%* Vth
    Trigger resolution
    250 ps
    Trigger types
    Channel, Pattern, Single / Multi Level, Parallel Clause, Width, Time-out, External
    Protocol Trigger
    BiSS-C, CAN2.0B/CAN FD, DALI, DP_Aux, eMMC 4.5, eSPI, HID over I2C, I2C, I2S, LIN2.2, LPC, MDIO, MII, Mini/Micro LED, MIPI I3C 1.1, MIPI RFFE 3, MIPI SPMI 2, Modbus, NAND Flash, PMBus, Profibus, PWM, RGMII, RMII, SD 3.0 (SDIO 2.0), SENT, Serial Flash (SPI NAND), SMBus, SPI, SVI2, SVID, UART (RS232), USB PD 3, USB1.1
    Protocol Analyzer
    BiSS-C, CAN2.0B/CAN FD, DALI, DP_Aux, eSPI, HID over I2C, I2C, I2S, LIN2.2, MDIO, MII, MIPI I3C 1.1, MIPI RFFE 3, Modbus, PMBus, Profibus, PWM, RGMII, RMII, SMBus, SPI, SVID, UART (RS232), USB PD 3, USB1.1
    [Specifications] LA4000 series
    [Manual] BusFinder & Logic Analyzer
    [Software] LA3000. 4000 series
    [Driver] USB 3.0 driver
    [SDK] Protocol Decode (C++)
    [SDK] LA AqLAVISA

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