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I²S

The Inter-Integrated Circuit Sound (I2S) bus has three data bits: Serial Clock (SCK), Word Select Line (WS) and Multiplex Data Line (SD).

Application: Audio
Signal: SCK, WS, SD
Voltage: 2.0V and 2.4V

Logic Analyzer / MSO

TB3016E

TB3016E

TB3000 series Specifications PDF

MSO2116E (w/ analog channels)

MSO2116E

MSO2000 series Specifications PDF

MSO3124V (w/ electrical validation)

MSO3124V

MSO3000 series Specifications PDF

Model TB3016E MSO2116E MSO3124V
Decode / Trigger y y y
Analog Channels y y
Electrical Validation y

I2S Decode / Waveform

Save as TXT/CSV

In Logic Analyzer mode, click the icon above the report area to save the decoded data as a TXT/CSV file.

Export Icon

I²S Electrical Validation

Use an oscilloscope for I²S electrical validation to ensure compliance with defined specifications. After an extended burn-in test, the oscilloscope confirms that the electrical characteristics of the signal meet the required standards.

Supported ModelsTS3124V (4-channel DSO), MSO3124V (4-channel DSO + 16-channel LA)

Electrical Validation Solution PDF

Electrical Validation solution pdf

I2S Decoding Setup Steps

1. Click Quick Settings or Add Protocol Decode to select a protocol for logic analyzer capture.

2. Select I2S for decoding.

3. If you use Quick Settings, the system will recommend configurations for trigger type, sampling rate, voltage threshold, and channel settings.

4. Click the icon to access the Decode Settings screen.

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Decode Settings

Channel: Show the selected channels (CH0, CH1 and CH2) and set Data bits (16 bits).

Display the audio waveform: Click to display the audio waveform in the Waveform Window.

Playback: Click to display the audio from the speaker.

Save as WAV file: Click to save the data to a audio file(.wav) in the work directory.

Mode: I2S Justified/MSB Justified/LSB Justified/PCM/TDM.

Report: Select the column number.

I2S Decoding Examples

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